An Integrated High Resolution CMOS Timing Generator Based On An Array Of Delay Locked Loops

·1996·DOI

Engineering and Technology

Communication and Signal Processing

VLSI Design and Technologies

VLSI Placement Strategies and Techniques

Role in the Field

Neutralin Engineering and Technology

Neutralin Communication and Signal Processing

Neutralin VLSI Design and Technologies

Neutralin VLSI Placement Strategies and Techniques

Abstract

Citations

76

Year

1996

PageRank

2.9 / 10

Relative influence (log-scaled)

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