Subthreshold CMOS Circuit Design

This cluster focuses on designing CMOS circuits that operate at low power levels, typically in the subthreshold region. Research includes voltage references and various circuit techniques aimed at minimizing power consumption while maintaining functionality.

Low-Power
Subthreshold
CMOS
Voltage Reference
Circuit Techniques
Power Consumption

2,394 papers

Parent topic: CMOS and High-Frequency Circuit Design

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Papers Over Time

19501960197019801990200020102020

Top Papers

A 2.6 nW, 0.45 V Temperature-Compensated Subthreshold CMOS Voltage Reference

2011 · 245 citations

Frequency Dependence Of Forward Capacitance-Voltage Characteristics Of Schottky Barrier Diodes

1993 · 232 citations

Second-order Intermodulation Mechanisms In CMOS Downconverters

2003 · 182 citations

A Low-Voltage Folded-Switching Mixer In 0.18-/Spl Mu/M CMOS

2005 · 168 citations

An All-Digital Phase-Locked Loop For High-Speed Clock Generation

2003 · 161 citations

A Sub-130-Nm Conditional Keeper Technique

2002 · 158 citations

A 1.2 V Reactive-Feedback 3.1–10.6 GHz Low-Noise Amplifier In 0.13 $\Mu{\Hbox {M}}$ CMOS

2007 · 150 citations

A 2-nW 1.1-V Self-Biased Current Reference In CMOS Technology

2005 · 150 citations

V CM ‐Based Monotonic Capacitor Switching Scheme For SAR ADC

2013 · 140 citations

A 280-GHz Schottky Diode Detector In 130-Nm Digital CMOS

2011 · 137 citations

A 7 Bit, 3.75 Ps Resolution Two-Step Time-to-Digital Converter In 65 Nm CMOS Using Pulse-Train Time Amplifier

2013 · 135 citations

A 10-Gb/s CMOS Clock And Data Recovery Circuit With A Half-Rate Binary Phase/Frequency Detector

2003 · 130 citations

A 1.8-V 6-Bit 1.3-GHz Flash ADC In 0.25-Μm CMOS

2003 · 129 citations

A 28-Nm 75-Fsrms Analog Fractional-$N$ Sampling PLL With A Highly Linear DTC Incorporating Background DTC Gain Calibration And Reference Clock Duty Cycle Correction

2019 · 126 citations

A Fully Integrated Digital LDO With Coarse–Fine-Tuning And Burst-Mode Operation

2016 · 122 citations

A Very Low-Power Quadrature VCO With Back-Gate Coupling

2004 · 118 citations

A 65fJ/Conversion-Step 0-to-50MS/s 0-to-0.7mW 9B Charge-Sharing SAR ADC In 90Nm Digital CMOS

2007 · 118 citations

A Novel 1.2–V 4.5-ppm/°C Curvature-Compensated CMOS Bandgap Reference

2014 · 116 citations

A 6.4-Gb/s CMOS SerDes Core With Feed-Forward And Decision-Feedback Equalization

2005 · 113 citations

Optimized Frequency-Shaping Circuit Topologies For LDOs

1998 · 113 citations