Physical Design Automation for VLSI

This cluster investigates techniques for automating physical design processes in VLSI circuits. It focuses on methodologies that enhance design efficiency and reduce layout errors.

physical design
automation
VLSI
layout
design efficiency
error reduction

3,224 papers

Parent topic: VLSI Design and Technologies

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Papers Over Time

1960197019801990200020102020

Top Papers

A Graph Placement Methodology For Fast Chip Design

2021 · 365 citations

GORDIAN: VLSI Placement By Quadratic Programming And Slicing Optimization

1991 · 342 citations

A Family Of VLSI Designs For The Motion Compensation Block-Matching Algorithm

1989 · 278 citations

FLUTE: Fast Lookup Table Based Rectilinear Steiner Minimal Tree Algorithm For VLSI Design

2008 · 233 citations

VLSI Cell Placement Techniques

1991 · 205 citations

The Design Of Special-Purpose VLSI Chips

1980 · 167 citations

Algorithms For VLSI Physical Design Automation

1993 · 160 citations

Algorithms For VLSI Physical Design Automation

1995 · 135 citations

On The Analysis And Synthesis Of VLSI Algorithms

1982 · 117 citations

Chip Layout Optimization Using Critical Path Weighting

1984 · 92 citations

VLSI Physical Design Automation

1999 · 81 citations

muFP, A Language For VLSI Design

1984 · 80 citations

Mason: A Global Floorplanning Approach For VLSI Design

1986 · 78 citations

A Design Methodology And Computer Aids For Digital VLSI Systems

1981 · 77 citations

Progress And Challenges In VLSI Placement Research

2015 · 63 citations

A Novel Common-Subexpression-Elimination Method For Synthesizing Fixed-Point FIR Filters

2004 · 63 citations

Performance Directed Synthesis For Table Look Up Programmable Gate Arrays

0 · 63 citations

Fast And Accurate Rectilinear Steiner Minimal Tree Algorithm For VLSI Design

2005 · 61 citations

A New Area And Shape Function Estimation Technique For VLSI Layouts

0 · 60 citations

Theory And Algorithm For Generalized Memory Partitioning In High-Level Synthesis

2014 · 57 citations