ASIC Design Methodologies

This cluster addresses advanced design and evaluation techniques for application-specific integrated circuits (ASICs). It compares performance metrics with FPGA implementations to identify design trade-offs.

ASIC
design methodologies
evaluation
FPGA comparison
performance metrics
trade-offs

4,653 papers

Parent topic: VLSI Design and Technologies

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Papers Over Time

194019501960197019801990200020102020

Top Papers

Measuring The Gap Between FPGAs And ASICs

2007 · 700 citations

OPASYN: A Compiler For CMOS Operational Amplifiers

1990 · 281 citations

Measuring The Gap Between FPGAs And ASICs

2006 · 223 citations

Analysis And Evaluation Of Interleaving Techniques In Forward Converters

1998 · 160 citations

Bit Weaving: A Non-Prefix Approach To Compressing Packet Classifiers In TCAMs

2012 · 127 citations

An 8-B 85-MS/s Parallel Pipeline A/D Converter In 1- Mu M CMOS

1993 · 123 citations

Packet Classification Using Extended TCAMs

0 · 111 citations

GaAs MESFET Logic With 4-GHz Clock Rate

1977 · 99 citations

Survey Of Turbo, LDPC, And Polar Decoder ASIC Implementations

2019 · 97 citations

Experimental Evaluation Of Physically Unclonable Functions In 65 Nm CMOS

2012 · 90 citations

An Optimized S-Box Circuit Architecture For Low Power AES Design

2003 · 89 citations

High Level Synthesis Of ASICs Under Timing And Synchronization Constraints

1992 · 83 citations

Low Latency Time CORDIC Algorithms

1992 · 81 citations

Using Ground Relays For Low-Latency Wide-Area Routing In Megaconstellations

2019 · 80 citations

Delay-optimized Implementation Of IEEE Floating-Point Addition

2004 · 76 citations

A Continuous-Time /Spl Sigma//spl Delta/ ADC With Increased Immunity To Interferers

2004 · 70 citations

Efficient Multimatch Packet Classification And Lookup With TCAM

2005 · 67 citations

FPGA-Based 40.9-Gbits/s Masked AES With Area Optimization For Storage Area Network

2013 · 66 citations

Nonredundant Successive Approximation Register For A/D Converters

1996 · 66 citations

Process And Environmental Variation Impacts On ASIC Timing

0 · 65 citations